Bootloaders, kernel drivers & FPGA logic
— from the reset vector to userspace.
( Profile )
Most of what I build runs before an operating system exists: reset vectors, DDR training sequences, flash partition tables, and bootloaders that have to survive a failed update and come back anyway. Office printers, automotive silicon bring-up, aerospace flight hardware — different industries, same question every time. Why won't this board boot?
I studied Electrical Engineering at UBC, then joined three teams in a row whose job was to make new silicon come up reliably — and to write down how, so the next engineer doesn't start from zero.
( What I do )
The chain from power-on to a running image: TF-A, U-Boot, FSBL and image selectors. I design flash layouts with backup and recovery images, fallback registers that catch a bad update, and secure boot flows that check integrity and authenticity before anything gets executed.
Board support below the application: memory maps and repartitioning, QSPI and NOR flash drivers, hibernation snapshots to SD and SSD, device tree, and Yocto or Buildroot images that reproduce byte-for-byte on the next machine.
No operating system between me and the register map. Cortex-R and Cortex-M firmware on FreeRTOS or none at all, SPI/I2C/UART/CAN peripheral drivers, SCP power and clock domains over SCMI, and MATLAB control algorithms ported down into embedded C.
Custom logic in the PL and the software that talks to it. AXI blocks that parse UART GNSS and IMU streams and hand encoded messages to the processing system through a queue, plus memory controllers and SPI, I2C and CAN cores written in Verilog and VHDL.
( Hardware )
Every family below asks for a different mental model — a scheduler and a page table on one end, a hand-counted interrupt latency on the other. These are the ones I keep going back to.
A / Embedded Linux
Full Linux on an application processor. Mainline kernels, device tree, U-Boot on removable media, and reproducible root filesystems built with Yocto or Buildroot.
BCM2711 · Cortex-A72
The fastest path from an idea to a booting Linux system. Kernel modules, device tree overlays and GPIO work before the real target exists.
AM335x · Cortex-A8
A TI application processor with expansion headers on both edges — U-Boot, eMMC versus microSD boot paths, and PRU-adjacent I/O.
B / Bare-metal
No kernel, no allocator, no safety net. Startup code, interrupt vectors, peripheral drivers written straight against the register map — and FreeRTOS when the timing demands it.
X5H / X5L · SCP
Automotive SoC bring-up: C code for power and clock domains on the System Control Processor, with SCMI transactions traced through SCP and kernel logs.
Cortex-M · HAL / register
The workhorse 32-bit MCU. Clock trees, DMA, timers and comms peripherals — debugged over SWD with a logic analyser on the bench.
Xtensa LX6 · Wi-Fi / BLE
Dual-core MCU with a radio attached. ESP-IDF and FreeRTOS tasks for connected sensor nodes and quick wireless prototypes.
8-bit AVR · 32 KB flash
Where the constraints teach you the most. 2 KB of SRAM makes every buffer, every interrupt and every byte of the vector table a deliberate decision.
C / SoC + FPGA
Hard processor system on one side, fabric on the other, and a bus between them. Linux or bare-metal on the PS, custom AXI logic in the PL, and a boot flow that has to bring up both.
Zynq UltraScale+ MPSoC
My current target. Cortex-A53 APU and Cortex-R5F RPU firmware, a four-image MT25Q flash layout with sector locking, and AXI logic parsing GNSS and IMU streams.
Cyclone V · FPGA + HPS
Where the fabric first made sense. Memory controllers and SPI, I2C and CAN cores built in Quartus around a Motorola 68000 soft system.
D / Edge AI
When the model has to run where the data is born — no round trip to a datacentre, a fixed power budget, and a GPU sharing memory with the CPU.
Tegra X1 · 128-core Maxwell
A CUDA-capable Linux board on the L4T stack. Camera and sensor pipelines feeding on-device inference, with the same BSP discipline as any other embedded target.
( Experience )
May 2026 — Present
Hanoi, Vietnam
Viettel Aerospace Institute
Jan 2026 — Apr 2026
Ho Chi Minh City, Vietnam
Ban Vien Corporation — Renesas Design Vietnam
Feb 2025 — Jan 2026
Hanoi, Vietnam
FPT Software — Konica Minolta Solution Lab Vietnam
( Education )
Aug 2020 — Nov 2025
Vancouver, BC, Canada
University of British Columbia
Relevant coursework
( Projects )
( Toolbox )
Languages
Firmware & OS
Tools
Spoken